At Cadence we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position Description
Lead one foundry PE team to help customers dev or enh PDK while receive little instruction on routine and general assignments.
To develop & integrate foundry rule decks & technology files to support PDKs by using foundry provided process design kits as a starting point.
PDK QA includes DRC LVS PEX EMIR Pcell layout Model Reliability&DFMRegression & release.
Developing scripts to port design databases- device to device device parameters layout layers and via mapping.
CDNS PDK development tools promotion and enhancements Pcell designer auto validation kits.
General tool usage support real-time support of all tools creating bug workarounds and filing CCRs with R&D
Position Requirements
Hands on experience to lead PDK team or develop projects. Direct major foundries professional background is a plus
Deep understanding of analog design flows including circuit and layout design physical verification (DRC/LVS/Dummy Fill) and postlayout RC extraction flows
Proficient in program/script languages includingPERL/TCL/SKILL. experience w/ Cadence PAS/Pcell Designer tool is desired.
Solid understanding of Spice models and simulation flows is required.
Bachelor with15 years related working experience. MS is a plus.
Were doing work that matters. Help us solve what others cant.
Required Experience:
IC
Employment Type : Full-Time Experience: years Vacancy: 1
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Customer Engagement Manager PDK Enablement • Shanghai, Shanghai, China